-- *************************************************************** -- Company: Integrated Device Technology, Inc. -- -- Part : RWM6050 -- -- Title: BSDL file of RWM6050 -- Generated by : AS -- -- Release status: formal issue -- Security level: client use -- BSDL Version 2001 -- Revision History: -- Feb 14, 2018: initial release -- May 16, 2018: tie Test pins to VSSIO; device ID 0x80E8 -- -- -- -- *************************************************************** -- -- Generated by boundaryScanGenerate 2016.4 Wed Dec 07 21:52:49 GMT 2016 on 11/02/17 09:22:53 -- BSDL Version 2001 entity RWM6050 is generic (PHYSICAL_PIN_MAP : string := "FCBGA"); port ( -- Port List RCI0_CSN6_S : out bit; RCI0_CSN4_S : out bit; RCI0_CSN5_S : out bit; I2C_SDA : inout bit; I2C_SCL : inout bit; RCI0_CSN3_S : inout bit; RESET_OUT : linkage bit; RCI0_MISO7_S : inout bit; RCI0_CSN2_S : inout bit; JTAG_SELECT : in bit; JTAG_TCK : in bit; JTAG_TDI : in bit; JTAG_TDO : out bit; JTAG_TMS : in bit; JTAG_TRSTN : in bit; MODE0 : inout bit; MODE1 : inout bit; FSPI_CLK : inout bit; FSPI_CSN : inout bit; FSPI_D0 : inout bit; FSPI_D1_D0 : inout bit; FSPI_D2_WPN : inout bit; FSPI_D3_HN : inout bit; UART_CTS : inout bit; UART_RX : inout bit; UART_RTS : out bit; RCI0_MOSI0_S : out bit; UART_TX : out bit; RCI0_MOSI2_S : out bit; RCI0_MOSI1_S : out bit; RCI0_MISO0_S : inout bit; RCI0_MOSI3_S : out bit; RCI0_CSN0_S : out bit; RCI0_MISO1_S : inout bit; RCI0_SCLK_S : out bit; RCI0_CSN1_S : out bit; DEBUG_TCK : linkage bit; DEBUG_TDI : linkage bit; DEBUG_TDO : linkage bit; DEBUG_TMS : linkage bit; DEBUG_TRSTN : linkage bit; RCI0_GPIO7 : inout bit; RCI0_GPIO9 : inout bit; RCI0_GPIO5 : inout bit; RCI0_GPIO8 : inout bit; RCI0_GPIO3 : inout bit; RCI0_GPIO6 : inout bit; RCI0_GPIO1 : inout bit; RCI0_GPIO4 : inout bit; RCI0_GPIO0 : inout bit; RCI0_GPIO2 : inout bit; RCI0_SCLK_P : linkage bit; RCI0_SCLK_N : linkage bit; RCI0_CSN0_P : linkage bit; RCI0_CSN0_N : linkage bit; RCI0_CSN1_P : linkage bit; RCI0_CSN1_N : linkage bit; RCI0_MOSI0_P : linkage bit; RCI0_MOSI0_N : linkage bit; RCI0_MOSI1_P : linkage bit; RCI0_MOSI1_N : linkage bit; RCI0_MOSI2_P : linkage bit; RCI0_MOSI2_N : linkage bit; RCI0_MOSI3_P : linkage bit; RCI0_MOSI3_N : linkage bit; RCI0_MISO6_S : inout bit; RCI0_MISO2_S : inout bit; RCI0_MISO4_S : inout bit; RCI0_MISO5_S : inout bit; RCI0_MISO3_S : inout bit; PWM_0 : out bit; RESET_N : in bit; REFCLK_TSYNC0 : inout bit; PCIE_WAKEN : inout bit; PCIE_CLKREQN : inout bit; PCIE_TX0_P : out bit; PCIE_TX0_N : out bit; PCIE_RX0_P : in bit; PCIE_RX0_N : in bit; PCIE_TX1_P : out bit; PCIE_TX1_N : out bit; PCIE_RX1_P : in bit; PCIE_RX1_N : in bit; GPIO_0 : inout bit; GPIO_1 : inout bit; GPIO_2 : inout bit; PWM_1 : out bit; RCI0_CSN7_S : out bit; SYSOSC_XO : linkage bit; REFCLK_TSYNC1 : inout bit; PCIE_PERSTN : linkage bit; PCIE_CLKN : linkage bit; PCIE_CLKP : linkage bit; SPI_CSN : out bit; SPI_SCLK : out bit; SPI_MISO : inout bit; SPI_MOSI : out bit; GPIO_3 : inout bit; GPIO_4 : inout bit; GPIO_5 : inout bit; GPIO_6 : inout bit; GPIO_7 : inout bit; GPIO_8 : inout bit; GPIO_9 : inout bit; GPIO_10 : inout bit; GPIO_11 : inout bit; GPIO_12 : inout bit; GPIO_13 : inout bit; GPIO_14 : inout bit; GPIO_15 : inout bit; RCI1_CSN7_S : inout bit; RCI1_CSN5_S : inout bit; RCI1_CSN6_S : inout bit; RCI1_CSN3_S : inout bit; RCI1_CSN4_S : inout bit; RCI1_CSN2_S : inout bit; RCI1_MISO7_S : inout bit; RCI1_MOSI2_S : out bit; RCI1_MOSI3_S : out bit; RCI1_MOSI0_S : out bit; RCI1_MOSI1_S : out bit; RCI1_MISO0_S : inout bit; RCI1_MISO1_S : inout bit; RCI1_CSN0_S : out bit; RCI1_CSN1_S : out bit; RCI1_SCLK_S : out bit; RCI1_GPIO8 : inout bit; RCI1_GPIO9 : inout bit; RCI1_GPIO6 : inout bit; RCI1_GPIO7 : inout bit; RCI1_GPIO4 : inout bit; RCI1_GPIO5 : inout bit; RCI1_GPIO2 : inout bit; RCI1_GPIO3 : inout bit; RCI1_GPIO0 : inout bit; RCI1_GPIO1 : inout bit; RCI1_SCLK_P : linkage bit; RCI1_SCLK_N : linkage bit; RCI1_CSN0_P : linkage bit; RCI1_CSN0_N : linkage bit; RCI1_CSN1_P : linkage bit; RCI1_CSN1_N : linkage bit; RCI1_MOSI0_P : linkage bit; RCI1_MOSI0_N : linkage bit; RCI1_MOSI1_P : linkage bit; RCI1_MOSI1_N : linkage bit; RCI1_MOSI2_P : linkage bit; RCI1_MOSI2_N : linkage bit; RCI1_MOSI3_P : linkage bit; RCI1_MOSI3_N : linkage bit; RCI1_MISO5_S : inout bit; RCI1_MISO6_S : inout bit; RCI1_MISO2_S : inout bit; RCI1_MISO4_S : inout bit; RCI1_MISO3_S : inout bit; MSFE0_ADC_IN : linkage bit; MSFE0_ADC_IP : linkage bit; MSFE0_ADC_QN : linkage bit; MSFE0_ADC_QP : linkage bit; MSFE0_ADC_VCM : linkage bit; MSFE0_DAC_IN : linkage bit; MSFE0_DAC_IP : linkage bit; MSFE0_DAC_QN : linkage bit; MSFE0_DAC_QP : linkage bit; MSFE0_CLKOUT : linkage bit; MSFE0_REFCLKN : linkage bit; MSFE0_REFCLKP : linkage bit; MSFE0_XI : linkage bit; MSFE0_XO : linkage bit; MSFE1_ADC_IN : linkage bit; MSFE1_ADC_IP : linkage bit; MSFE1_ADC_QN : linkage bit; MSFE1_ADC_QP : linkage bit; MSFE1_ADC_VCM : linkage bit; MSFE1_DAC_IN : linkage bit; MSFE1_DAC_IP : linkage bit; MSFE1_DAC_QN : linkage bit; MSFE1_DAC_QP : linkage bit; MSFE1_CLKOUT : linkage bit; MSFE1_REFCLKN : linkage bit; MSFE1_REFCLKP : linkage bit; MSFE1_XI : linkage bit; MSFE1_XO : linkage bit; PCIE_RBIAS : linkage bit; SYSOSC_XI : linkage bit; RCI0_REF : linkage bit; RCI1_REF : linkage bit; PCIE_VP : linkage bit; PCIE_VPH : linkage bit; PCIE_VPTX : linkage bit; A2 : linkage bit; A1 : linkage bit; A4 : linkage bit; A3 : linkage bit; A5 : linkage bit; A6 : linkage bit; A7 : linkage bit; AUX_VPH : linkage bit; AUX_VP2 : linkage bit; AUX_VP1 : linkage bit; MSFE1_OSC_AVDDH : linkage bit; MSFE1_PLL_AVDD : linkage bit; MSFE1_PLL_AVDDH : linkage bit; MSFE0_OSC_AVDDH : linkage bit; MSFE0_PLL_AVDD : linkage bit; MSFE0_PLL_AVDDH : linkage bit; TSENSE_AVDDH : linkage bit; TSENSE_AVSS : linkage bit; PLL0_VSSA : linkage bit; PLL0_DVSS : linkage bit; PLL0_VDDA : linkage bit; PLL0_VDDH : linkage bit; PLL0_DVDD : linkage bit; PLL1_VSSA : linkage bit; PLL1_DVSS : linkage bit; PLL1_VDDA : linkage bit; PLL1_VDDH : linkage bit; PLL1_DVDD : linkage bit; RCI0_VDDIO : linkage bit; RCI1_VDDIO : linkage bit; VDD : linkage bit_vector(0 to 47) ; VSS : linkage bit_vector(0 to 63) ; MSFE0_AVDDH : linkage bit_vector(0 to 3) ; MSFE0_AVDD : linkage bit_vector(0 to 2) ; MSFE1_AVDDH : linkage bit_vector(0 to 3) ; MSFE1_AVDD : linkage bit_vector(0 to 2) ; MSFE0_AVSS : linkage bit_vector(0 to 26) ; MSFE1_AVSS : linkage bit_vector(0 to 26) ; LVDS_VDDIO : linkage bit_vector(0 to 5) ; VDDIO : linkage bit_vector(0 to 11) ; VSSIO : linkage bit_vector(0 to 58) ); use STD_1149_1_2001.all; use STD_1149_6_2003.all; use LVS_BSCAN_CELLS.all; attribute COMPONENT_CONFORMANCE of RWM6050: entity is "STD_1149_1_2001"; --Pin mappings attribute PIN_MAP of RWM6050: entity is PHYSICAL_PIN_MAP; constant FCBGA: PIN_MAP_STRING := "RCI0_CSN6_S : F18 , " & "RCI0_CSN4_S : G19 , " & "RCI0_CSN5_S : G18 , " & "I2C_SDA : A21 , " & "I2C_SCL : A20 , " & "RCI0_CSN3_S : H18 , " & "RESET_OUT : B22 , " & "RCI0_MISO7_S : J19 , " & "RCI0_CSN2_S : J18 , " & "JTAG_SELECT : D20 , " & "JTAG_TCK : B21 , " & "JTAG_TDI : C20 , " & "JTAG_TDO : B20 , " & "JTAG_TMS : C21 , " & "JTAG_TRSTN : D21 , " & "MODE0 : C22 , " & "MODE1 : D22 , " & "FSPI_CLK : E21 , " & "FSPI_CSN : E22 , " & "FSPI_D0 : F21 , " & "FSPI_D1_D0 : F22 , " & "FSPI_D2_WPN : G21 , " & "FSPI_D3_HN : G22 , " & "UART_CTS : J21 , " & "UART_RX : H22 , " & "UART_RTS : H21 , " & "RCI0_MOSI0_S : U20 , " & "UART_TX : J22 , " & "RCI0_MOSI2_S : V20 , " & "RCI0_MOSI1_S : U19 , " & "RCI0_MISO0_S : T20 , " & "RCI0_MOSI3_S : V19 , " & "RCI0_CSN0_S : R18 , " & "RCI0_MISO1_S : T19 , " & "RCI0_SCLK_S : R19 , " & "RCI0_CSN1_S : V18 , " & "DEBUG_TCK : E20 , " & "DEBUG_TDI : H20 , " & "DEBUG_TDO : G20 , " & "DEBUG_TMS : J20 , " & "DEBUG_TRSTN : K20 , " & "RCI0_GPIO7 : N19 , " & "RCI0_GPIO9 : P18 , " & "RCI0_GPIO5 : L19 , " & "RCI0_GPIO8 : N18 , " & "RCI0_GPIO3 : L21 , " & "RCI0_GPIO6 : N20 , " & "RCI0_GPIO1 : K21 , " & "RCI0_GPIO4 : L20 , " & "RCI0_GPIO0 : K22 , " & "RCI0_GPIO2 : L22 , " & "RCI0_SCLK_P : N21 , " & "RCI0_SCLK_N : N22 , " & "RCI0_CSN0_P : M21 , " & "RCI0_CSN0_N : M22 , " & "RCI0_CSN1_P : V21 , " & "RCI0_CSN1_N : V22 , " & "RCI0_MOSI0_P : P21 , " & "RCI0_MOSI0_N : P22 , " & "RCI0_MOSI1_P : R21 , " & "RCI0_MOSI1_N : R22 , " & "RCI0_MOSI2_P : T21 , " & "RCI0_MOSI2_N : T22 , " & "RCI0_MOSI3_P : U21 , " & "RCI0_MOSI3_N : U22 , " & "RCI0_MISO6_S : Y20 , " & "RCI0_MISO2_S : Y16 , " & "RCI0_MISO4_S : Y18 , " & "RCI0_MISO5_S : Y19 , " & "RCI0_MISO3_S : Y17 , " & "PWM_0 : A19 , " & "RESET_N : A18 , " & "REFCLK_TSYNC0 : B16 , " & "PCIE_WAKEN : B15 , " & "PCIE_CLKREQN : C13 , " & "PCIE_TX0_P : B10 , " & "PCIE_TX0_N : A9 , " & "PCIE_RX0_P : A11 , " & "PCIE_RX0_N : A10 , " & "PCIE_TX1_P : B12 , " & "PCIE_TX1_N : A12 , " & "PCIE_RX1_P : B14 , " & "PCIE_RX1_N : A13 , " & "GPIO_0 : C2 , " & "GPIO_1 : D1 , " & "GPIO_2 : D2 , " & "PWM_1 : B19 , " & "RCI0_CSN7_S : E18 , " & "SYSOSC_XO : A16 , " & "REFCLK_TSYNC1 : B17 , " & "PCIE_PERSTN : A14 , " & "PCIE_CLKN : B8 , " & "PCIE_CLKP : A8 , " & "SPI_CSN : A2 , " & "SPI_SCLK : B1 , " & "SPI_MISO : B2 , " & "SPI_MOSI : C1 , " & "GPIO_3 : E1 , " & "GPIO_4 : E2 , " & "GPIO_5 : E3 , " & "GPIO_6 : F1 , " & "GPIO_7 : F2 , " & "GPIO_8 : F3 , " & "GPIO_9 : G1 , " & "GPIO_10 : G2 , " & "GPIO_11 : H1 , " & "GPIO_12 : H2 , " & "GPIO_13 : J1 , " & "GPIO_14 : J2 , " & "GPIO_15 : J3 , " & "RCI1_CSN7_S : J5 , " & "RCI1_CSN5_S : K5 , " & "RCI1_CSN6_S : J4 , " & "RCI1_CSN3_S : L5 , " & "RCI1_CSN4_S : K4 , " & "RCI1_CSN2_S : L4 , " & "RCI1_MISO7_S : M5 , " & "RCI1_MOSI2_S : V3 , " & "RCI1_MOSI3_S : V4 , " & "RCI1_MOSI0_S : U3 , " & "RCI1_MOSI1_S : U4 , " & "RCI1_MISO0_S : T3 , " & "RCI1_MISO1_S : T4 , " & "RCI1_CSN0_S : R5 , " & "RCI1_CSN1_S : V5 , " & "RCI1_SCLK_S : R4 , " & "RCI1_GPIO8 : N5 , " & "RCI1_GPIO9 : P5 , " & "RCI1_GPIO6 : N3 , " & "RCI1_GPIO7 : N4 , " & "RCI1_GPIO4 : L2 , " & "RCI1_GPIO5 : L3 , " & "RCI1_GPIO2 : K3 , " & "RCI1_GPIO3 : L1 , " & "RCI1_GPIO0 : K1 , " & "RCI1_GPIO1 : K2 , " & "RCI1_SCLK_P : N2 , " & "RCI1_SCLK_N : N1 , " & "RCI1_CSN0_P : M2 , " & "RCI1_CSN0_N : M1 , " & "RCI1_CSN1_P : V2 , " & "RCI1_CSN1_N : V1 , " & "RCI1_MOSI0_P : P2 , " & "RCI1_MOSI0_N : P1 , " & "RCI1_MOSI1_P : R2 , " & "RCI1_MOSI1_N : R1 , " & "RCI1_MOSI2_P : T2 , " & "RCI1_MOSI2_N : T1 , " & "RCI1_MOSI3_P : U2 , " & "RCI1_MOSI3_N : U1 , " & "RCI1_MISO5_S : Y4 , " & "RCI1_MISO6_S : Y3 , " & "RCI1_MISO2_S : Y7 , " & "RCI1_MISO4_S : Y5 , " & "RCI1_MISO3_S : Y6 , " & "MSFE0_ADC_IN : Y22 , " & "MSFE0_ADC_IP : AA22 , " & "MSFE0_ADC_QN : AB21 , " & "MSFE0_ADC_QP : AB20 , " & "MSFE0_ADC_VCM : AA21 , " & "MSFE0_DAC_IN : AB13 , " & "MSFE0_DAC_IP : AB12 , " & "MSFE0_DAC_QN : AB15 , " & "MSFE0_DAC_QP : AB14 , " & "MSFE0_CLKOUT : AA19 , " & "MSFE0_REFCLKN : AB19 , " & "MSFE0_REFCLKP : AB18 , " & "MSFE0_XI : AB16 , " & "MSFE0_XO : AB17 , " & "MSFE1_ADC_IN : Y1 , " & "MSFE1_ADC_IP : AA1 , " & "MSFE1_ADC_QN : AB2 , " & "MSFE1_ADC_QP : AB3 , " & "MSFE1_ADC_VCM : AA2 , " & "MSFE1_DAC_IN : AB10 , " & "MSFE1_DAC_IP : AB11 , " & "MSFE1_DAC_QN : AB8 , " & "MSFE1_DAC_QP : AB9 , " & "MSFE1_CLKOUT : AA4 , " & "MSFE1_REFCLKN : AB4 , " & "MSFE1_REFCLKP : AB5 , " & "MSFE1_XI : AB7 , " & "MSFE1_XO : AB6 , " & "PCIE_RBIAS : E12 , " & "SYSOSC_XI : A17 , " & "RCI0_REF : R20 , " & "RCI1_REF : R3 , " & "PCIE_VP : F13 , " & "PCIE_VPH : E10 , " & "A2 : B3 , " & "A1 : C3 , " & "A4 : A4 , " & "A3 : B4 , " & "A5 : A5 , " & "A6 : B6 , " & "A7 : E6 , " & "AUX_VPH : F7 , " & "AUX_VP2 : E8 , " & "AUX_VP1 : F9 , " & "MSFE1_OSC_AVDDH : T9 , " & "MSFE1_PLL_AVDD : T7 , " & "MSFE1_PLL_AVDDH : U8 , " & "MSFE0_OSC_AVDDH : T14 , " & "MSFE0_PLL_AVDD : T16 , " & "MSFE0_PLL_AVDDH : U15 , " & "PCIE_VPTX : F11 , " & "TSENSE_AVDDH : G6 , " & "TSENSE_AVSS : G7 , " & "PLL0_VSSA : E16 , " & "PLL0_DVSS : F16 , " & "PLL0_VDDA : E17 , " & "PLL0_VDDH : D17 , " & "PLL0_DVDD : F17 , " & "PLL1_VSSA : E15 , " & "PLL1_DVSS : F15 , " & "PLL1_VDDA : E14 , " & "PLL1_VDDH : D14 , " & "PLL1_DVDD : F14 , " & "RCI0_VDDIO : U18 , " & "RCI1_VDDIO : T5 , " & "VDD : (R6, H7, K7, M7, P7, G8, J8, L8, N8, R8, H9, K9, M9, P9, G10, J10, L10, N10, R10, H11, K11, M11, " & " P11, G12, J12, L12, N12, R12, H13, K13, M13, P13, J14, L14, N14, R14, H15, K15, M15, P15, G16, " & " J16, L16, N16, R16, K17, M17, P17 ), " & "VSS : (B5, K6, M6, B7, E7, J7, L7, N7, R7, F8, H8, K8, M8, P8, B9, E9, G9, J9, L9, N9, R9, F10, H10, " & " K10, M10, P10, B11, E11, G11, J11, L11, N11, R11, F12, H12, K12, M12, P12, B13, E13, G13, J13, " & " L13, N13, R13, H14, K14, M14, P14, A15, J15, L15, N15, R15, H16, K16, M16, P16, J17, L17, " & " N17, R17, M18, E4 ) , " & "MSFE0_AVDDH : (W15, V16, U17, W17 ) , " & "MSFE0_AVDD : (T12, U13, V14 ) , " & "MSFE1_AVDDH : (U6, W6, V7, W8 ) , " & "MSFE1_AVDD : (V9, U10, T11 ) , " & "MSFE0_AVSS : (U12, V12, W12, Y12, AA12, T13, V13, W13, Y13, AA13, U14, W14, Y14, AA14, T15, V15, Y15, " & "U16, W16, T17, V17, AA17, W18, AA18, AA20, Y21, AB22 )," & "MSFE1_AVSS : (AB1, Y2, AA3, W5, AA5, T6, V6, AA6, U7, W7, T8, V8, Y8, U9, W9, Y9, AA9, T10, V10, W10, Y10, " & " AA10, U11, V11, W11, Y11, AA11 ), " & "LVDS_VDDIO : (W2, M3, P4, M19, P19, W21 ) , " & "VDDIO : (D3, H3, W4, J6, L6, N6, G14, H17, L18, D19, F19, W19 ) , " & "VSSIO : (A1, W1, G3, P3, W3, D4, M4, U5, H6, P6, G15, G17, K18, T18, C19, F20, M20, P20, W20, A22, W22, C17, "& "C16, C15, H19, K19, E19, C12, D12, C11, D11, C10, D10, C9, D9, C8, D8, C7, D7, C6, D6, C5, D5, C4, E5, F6, "& "F5, F4, G5, G4, H5, H4, D13, C18, D16, D18, D15, B18, C14 ) " ; attribute PORT_GROUPING of RWM6050 : entity is "Differential_Voltage ( (PCIE_TX0_P, PCIE_TX0_N), " & "(PCIE_RX0_P, PCIE_RX0_N), " & "(PCIE_TX1_P, PCIE_TX1_N), " & "(PCIE_RX1_P, PCIE_RX1_N)) " ; attribute TAP_SCAN_RESET of JTAG_TRSTN : signal is true; attribute TAP_SCAN_IN of JTAG_TDI : signal is true; attribute TAP_SCAN_MODE of JTAG_TMS : signal is true; attribute TAP_SCAN_OUT of JTAG_TDO : signal is true; attribute TAP_SCAN_CLOCK of JTAG_TCK : signal is (1.0000000000000000000e+07, BOTH); attribute COMPLIANCE_PATTERNS of RWM6050 : entity is "(JTAG_SELECT,RESET_N) (10)"; attribute INSTRUCTION_LENGTH of RWM6050: entity is 34; attribute INSTRUCTION_OPCODE of RWM6050: entity is "IDCODE (1111111111111111111111111111111110)," & "BYPASS (1111111111111111111111111111111111)," & "EXTEST (1111111111111111111111111111101000)," & "EXTEST_PULSE (1111111111111111101111111111101000)," & "EXTEST_TRAIN (1111111111111111011111111111101000)," & "SAMPLE (1111111111111111111111111111111000)," & "PRELOAD (1111111111111111111111111111111000)," & "HIGHZ (1111111111111111111111111111001111)," & "CLAMP (1111111111111111111111111111101111) " ; attribute INSTRUCTION_CAPTURE of RWM6050: entity is "xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx01"; attribute IDCODE_REGISTER of RWM6050: entity is "0001" & -- version "1000000011101000" & -- part number "00000110011" & -- manufacturer's identity "1"; -- required by 1149.1 attribute REGISTER_ACCESS of RWM6050: entity is "BOUNDARY ( EXTEST_PULSE, EXTEST_TRAIN )," & "DEVICE_ID ( IDCODE ), " & "BOUNDARY ( SAMPLE, PRELOAD, EXTEST )," & "BYPASS ( HIGHZ, CLAMP, BYPASS ) " ; --Boundary scan definition attribute BOUNDARY_LENGTH of RWM6050: entity is 257; attribute BOUNDARY_REGISTER of RWM6050: entity is -- num cell port function safe [ccell disval rslt] " 256 (BC_2 , * , control , 1 ) ,"& " 255 (BC_2 , RCI0_CSN6_S , output3 , X , 256 , 1 , Z ),"& " 254 (BC_2 , * , control , 1 ) ,"& " 253 (BC_2 , RCI0_CSN4_S , output3 , X , 254 , 1 , Z ),"& " 252 (BC_2 , * , control , 1 ) ,"& " 251 (BC_2 , RCI0_CSN5_S , output3 , X , 252 , 1 , Z ),"& " 250 (BC_2 , * , control , 1 ) ,"& " 249 (LV_BC_7 , I2C_SDA , bidir , X , 250 , 1 , Z ),"& " 248 (BC_2 , * , control , 1 ) ,"& " 247 (LV_BC_7 , I2C_SCL , bidir , X , 248 , 1 , Z ),"& " 246 (BC_2 , * , control , 1 ) ,"& " 245 (LV_BC_7 , RCI0_CSN3_S , bidir , X , 246 , 1 , Z ),"& " 244 (BC_2 , * , control , 1 ) ,"& " 243 (BC_2 , * , control , 1 ) ,"& " 242 (LV_BC_7 , RCI0_MISO7_S , bidir , X , 243 , 1 , Z ),"& " 241 (BC_2 , * , control , 1 ) ,"& " 240 (LV_BC_7 , RCI0_CSN2_S , bidir , X , 241 , 1 , Z ),"& " 239 (BC_0 , * , internal , 0 ),"& " 238 (BC_2 , * , control , 1 ) ,"& " 237 (LV_BC_7 , MODE0 , bidir , X , 238 , 1 , Z ),"& " 236 (LV_BC_7 , MODE1 , bidir , X , 238 , 1 , Z ),"& " 235 (BC_2 , * , control , 1 ) ,"& " 234 (LV_BC_7 , FSPI_CLK , bidir , X , 235 , 1 , Z ),"& " 233 (BC_2 , * , control , 1 ) ,"& " 232 (LV_BC_7 , FSPI_CSN , bidir , X , 233 , 1 , Z ),"& " 231 (BC_2 , * , control , 1 ) ,"& " 230 (LV_BC_7 , FSPI_D0 , bidir , X , 231 , 1 , Z ),"& " 229 (BC_2 , * , control , 1 ) ,"& " 228 (LV_BC_7 , FSPI_D1_D0 , bidir , X , 229 , 1 , Z ),"& " 227 (BC_2 , * , control , 1 ) ,"& " 226 (LV_BC_7 , FSPI_D2_WPN , bidir , X , 227 , 1 , Z ),"& " 225 (BC_2 , * , control , 1 ) ,"& " 224 (LV_BC_7 , FSPI_D3_HN , bidir , X , 225 , 1 , Z ),"& " 223 (BC_2 , * , control , 1 ) ,"& " 222 (LV_BC_7 , UART_CTS , bidir , X , 223 , 1 , Z ),"& " 221 (LV_BC_7 , UART_RX , bidir , X , 223 , 1 , Z ),"& " 220 (BC_2 , UART_RTS , output3 , X , 244 , 1 , Z ),"& " 219 (BC_2 , * , control , 1 ) ,"& " 218 (BC_2 , RCI0_MOSI0_S , output3 , X , 219 , 1 , Z ),"& " 217 (BC_2 , UART_TX , output3 , X , 219 , 1 , Z ),"& " 216 (BC_2 , * , control , 1 ) ,"& " 215 (BC_2 , RCI0_MOSI2_S , output3 , X , 216 , 1 , Z ),"& " 214 (BC_2 , RCI0_MOSI1_S , output3 , X , 216 , 1 , Z ),"& " 213 (BC_2 , * , control , 1 ) ,"& " 212 (LV_BC_7 , RCI0_MISO0_S , bidir , X , 213 , 1 , Z ),"& " 211 (BC_2 , * , control , 1 ) ,"& " 210 (BC_2 , RCI0_MOSI3_S , output3 , X , 211 , 1 , Z ),"& " 209 (BC_2 , RCI0_CSN0_S , output3 , X , 211 , 1 , Z ),"& " 208 (BC_2 , * , control , 1 ) ,"& " 207 (LV_BC_7 , RCI0_MISO1_S , bidir , X , 208 , 1 , Z ),"& " 206 (BC_2 , * , control , 1 ) ,"& " 205 (BC_2 , RCI0_SCLK_S , output3 , X , 206 , 1 , Z ),"& " 204 (BC_2 , RCI0_CSN1_S , output3 , X , 206 , 1 , Z ),"& " 203 (BC_2 , * , control , 1 ) ,"& " 202 (LV_BC_7 , RCI0_GPIO7 , bidir , X , 203 , 1 , Z ),"& " 201 (BC_2 , * , control , 1 ) ,"& " 200 (LV_BC_7 , RCI0_GPIO9 , bidir , X , 201 , 1 , Z ),"& " 199 (BC_2 , * , control , 1 ) ,"& " 198 (LV_BC_7 , RCI0_GPIO5 , bidir , X , 199 , 1 , Z ),"& " 197 (BC_2 , * , control , 1 ) ,"& " 196 (LV_BC_7 , RCI0_GPIO8 , bidir , X , 197 , 1 , Z ),"& " 195 (BC_2 , * , control , 1 ) ,"& " 194 (LV_BC_7 , RCI0_GPIO3 , bidir , X , 195 , 1 , Z ),"& " 193 (BC_2 , * , control , 1 ) ,"& " 192 (LV_BC_7 , RCI0_GPIO6 , bidir , X , 193 , 1 , Z ),"& " 191 (BC_2 , * , control , 1 ) ,"& " 190 (LV_BC_7 , RCI0_GPIO1 , bidir , X , 191 , 1 , Z ),"& " 189 (BC_2 , * , control , 1 ) ,"& " 188 (LV_BC_7 , RCI0_GPIO4 , bidir , X , 189 , 1 , Z ),"& " 187 (BC_2 , * , control , 1 ) ,"& " 186 (LV_BC_7 , RCI0_GPIO0 , bidir , X , 187 , 1 , Z ),"& " 185 (BC_2 , * , control , 1 ) ,"& " 184 (LV_BC_7 , RCI0_GPIO2 , bidir , X , 185 , 1 , Z ),"& " 183 (BC_2 , * , control , 1 ) ,"& " 182 (LV_BC_7 , RCI0_MISO6_S , bidir , X , 183 , 1 , Z ),"& " 181 (LV_BC_7 , RCI0_MISO2_S , bidir , X , 183 , 1 , Z ),"& " 180 (BC_2 , * , control , 1 ) ,"& " 179 (LV_BC_7 , RCI0_MISO4_S , bidir , X , 180 , 1 , Z ),"& " 178 (LV_BC_7 , RCI0_MISO5_S , bidir , X , 180 , 1 , Z ),"& " 177 (BC_2 , * , control , 1 ) ,"& " 176 (LV_BC_7 , RCI0_MISO3_S , bidir , X , 177 , 1 , Z ),"& " 175 (BC_2 , * , control , 1 ) ,"& " 174 (BC_2 , PWM_0 , output3 , X , 175 , 1 , Z ),"& " 173 (BC_0 , * , internal , 0 ),"& " 172 (BC_0 , * , internal , 0 ) ,"& " 171 (BC_0 , * , internal , 0 ),"& " 170 (BC_2 , * , control , 1 ) ,"& " 169 (LV_BC_7 , REFCLK_TSYNC0 , bidir , X , 170 , 1 , Z ),"& " 168 (BC_0 , * , internal , 0 ),"& " 167 (BC_0 , * , internal , 0 ) ,"& " 166 (BC_0 , * , internal , 0 ),"& " 165 (BC_0 , * , internal , 0 ),"& " 164 (BC_2 , * , control , 1 ) ,"& " 163 (LV_BC_7 , PCIE_WAKEN , bidir , X , 164 , 1 , Z ),"& " 162 (BC_2 , * , control , 1 ) ,"& " 161 (LV_BC_7 , PCIE_CLKREQN , bidir , X , 162 , 1 , Z ),"& " 160 (BC_1 , * , control , 0 ) ,"& " 159 (AC_1 , PCIE_TX0_P , output3 , X , 160 , 0 , Z ),"& " 158 (BC_1 , PCIE_RX0_P , input , X ) ,"& " 157 (BC_1 , PCIE_RX0_N , input , X ) ,"& " 156 (BC_1 , * , control , 0 ) ,"& " 155 (AC_1 , PCIE_TX1_P , output3 , X , 156 , 0 , Z ),"& " 154 (BC_1 , PCIE_RX1_P , input , X ) ,"& " 153 (BC_1 , PCIE_RX1_N , input , X ) ,"& " 152 (BC_0 , * , internal , 0 ) ,"& " 151 (BC_0 , * , internal , 0 ),"& " 150 (BC_0 , * , internal , 0 ) ,"& " 149 (BC_0 , * , internal , 0 ),"& " 148 (BC_0 , * , internal , 0 ) ,"& " 147 (BC_0 , * , internal , 0 ),"& " 146 (BC_0 , * , internal , 0 ) ,"& " 145 (BC_0 , * , internal , 0 ),"& " 144 (BC_0 , * , internal , 0 ) ,"& " 143 (BC_0 , * , internal , 0 ),"& " 142 (BC_2 , * , control , 1 ) ,"& " 141 (LV_BC_7 , GPIO_0 , bidir , X , 142 , 1 , Z ),"& " 140 (BC_2 , * , control , 1 ) ,"& " 139 (LV_BC_7 , GPIO_1 , bidir , X , 140 , 1 , Z ),"& " 138 (BC_2 , * , control , 1 ) ,"& " 137 (LV_BC_7 , GPIO_2 , bidir , X , 138 , 1 , Z ),"& " 136 (BC_2 , PWM_1 , output3 , X , 175 , 1 , Z ),"& " 135 (BC_2 , * , control , 1 ) ,"& " 134 (BC_2 , RCI0_CSN7_S , output3 , X , 135 , 1 , Z ),"& " 133 (BC_0 , * , internal , 0 ) ,"& " 132 (BC_0 , * , internal , 0 ),"& " 131 (BC_2 , * , control , 1 ) ,"& " 130 (LV_BC_7 , REFCLK_TSYNC1 , bidir , X , 131 , 1 , Z ),"& " 129 (BC_0 , * , internal , 0 ),"& " 128 (BC_2 , * , control , 1 ) ,"& " 127 (BC_2 , * , control , 1 ) ,"& " 126 (BC_2 , SPI_CSN , output3 , X , 127 , 1 , Z ),"& " 125 (BC_2 , SPI_SCLK , output3 , X , 127 , 1 , Z ),"& " 124 (LV_BC_7 , SPI_MISO , bidir , X , 128 , 1 , Z ),"& " 123 (BC_2 , * , control , 1 ) ,"& " 122 (BC_2 , SPI_MOSI , output3 , X , 123 , 1 , Z ),"& " 121 (BC_0 , * , internal , 0 ) ,"& " 120 (BC_0 , * , internal , 0 ),"& " 119 (BC_0 , * , internal , 0 ) ,"& " 118 (BC_0 , * , internal , 0 ),"& " 117 (BC_0 , * , internal , 0 ) ,"& " 116 (BC_0 , * , internal , 0 ),"& " 115 (BC_0 , * , internal , 0 ) ,"& " 114 (BC_0 , * , internal , 0 ),"& " 113 (BC_0 , * , internal , 0 ) ,"& " 112 (BC_0 , * , internal , 0 ),"& " 111 (BC_0 , * , internal , 0 ) ,"& " 110 (BC_0 , * , internal , 0 ),"& " 109 (BC_2 , * , control , 1 ) ,"& " 108 (LV_BC_7 , GPIO_3 , bidir , X , 109 , 1 , Z ),"& " 107 (BC_0 , * , internal , 0 ) ,"& " 106 (BC_0 , * , internal , 0 ),"& " 105 (BC_2 , * , control , 1 ) ,"& " 104 (LV_BC_7 , GPIO_4 , bidir , X , 105 , 1 , Z ),"& " 103 (BC_0 , * , internal , 0 ) ,"& " 102 (BC_0 , * , internal , 0 ),"& " 101 (BC_2 , * , control , 1 ) ,"& " 100 (LV_BC_7 , GPIO_5 , bidir , X , 101 , 1 , Z ),"& " 99 (BC_0 , * , internal , 0 ) ,"& " 98 (BC_0 , * , internal , 0 ),"& " 97 (BC_2 , * , control , 1 ) ,"& " 96 (LV_BC_7 , GPIO_6 , bidir , X , 97 , 1 , Z ),"& " 95 (BC_0 , * , internal , 0 ) ,"& " 94 (BC_0 , * , internal , 0 ),"& " 93 (BC_2 , * , control , 1 ) ,"& " 92 (LV_BC_7 , GPIO_7 , bidir , X , 93 , 1 , Z ),"& " 91 (BC_0 , * , internal , 0 ) ,"& " 90 (BC_0 , * , internal , 0 ),"& " 89 (BC_2 , * , control , 1 ) ,"& " 88 (LV_BC_7 , GPIO_8 , bidir , X , 89 , 1 , Z ),"& " 87 (BC_0 , * , internal , 0 ) ,"& " 86 (BC_0 , * , internal , 0 ),"& " 85 (BC_2 , * , control , 1 ) ,"& " 84 (LV_BC_7 , GPIO_9 , bidir , X , 85 , 1 , Z ),"& " 83 (BC_0 , * , internal , 0 ) ,"& " 82 (BC_0 , * , internal , 0 ),"& " 81 (BC_2 , * , control , 1 ) ,"& " 80 (LV_BC_7 , GPIO_10 , bidir , X , 81 , 1 , Z ),"& " 79 (BC_0 , * , internal , 0 ) ,"& " 78 (BC_0 , * , internal , 0 ),"& " 77 (BC_2 , * , control , 1 ) ,"& " 76 (LV_BC_7 , GPIO_11 , bidir , X , 77 , 1 , Z ),"& " 75 (BC_0 , * , internal , 0 ) ,"& " 74 (BC_0 , * , internal , 0 ),"& " 73 (BC_2 , * , control , 1 ) ,"& " 72 (LV_BC_7 , GPIO_12 , bidir , X , 73 , 1 , Z ),"& " 71 (BC_0 , * , internal , 0 ) ,"& " 70 (BC_0 , * , internal , 0 ),"& " 69 (BC_2 , * , control , 1 ) ,"& " 68 (LV_BC_7 , GPIO_13 , bidir , X , 69 , 1 , Z ),"& " 67 (BC_0 , * , internal , 0 ) ,"& " 66 (BC_0 , * , internal , 0 ),"& " 65 (BC_2 , * , control , 1 ) ,"& " 64 (LV_BC_7 , GPIO_14 , bidir , X , 65 , 1 , Z ),"& " 63 (BC_0 , * , internal , 0 ) ,"& " 62 (BC_0 , * , internal , 0 ),"& " 61 (BC_2 , * , control , 1 ) ,"& " 60 (LV_BC_7 , GPIO_15 , bidir , X , 61 , 1 , Z ),"& " 59 (BC_0 , * , internal , 0 ) ,"& " 58 (BC_0 , * , internal , 0 ),"& " 57 (BC_2 , * , control , 1 ) ,"& " 56 (LV_BC_7 , RCI1_CSN7_S , bidir , X , 57 , 1 , Z ),"& " 55 (BC_0 , * , internal , 0 ) ,"& " 54 (BC_0 , * , internal , 0 ),"& " 53 (BC_2 , * , control , 1 ) ,"& " 52 (LV_BC_7 , RCI1_CSN5_S , bidir , X , 53 , 1 , Z ),"& " 51 (BC_2 , * , control , 1 ) ,"& " 50 (LV_BC_7 , RCI1_CSN6_S , bidir , X , 51 , 1 , Z ),"& " 49 (BC_2 , * , control , 1 ) ,"& " 48 (LV_BC_7 , RCI1_CSN3_S , bidir , X , 49 , 1 , Z ),"& " 47 (BC_2 , * , control , 1 ) ,"& " 46 (LV_BC_7 , RCI1_CSN4_S , bidir , X , 47 , 1 , Z ),"& " 45 (BC_2 , * , control , 1 ) ,"& " 44 (LV_BC_7 , RCI1_CSN2_S , bidir , X , 45 , 1 , Z ),"& " 43 (BC_2 , * , control , 1 ) ,"& " 42 (LV_BC_7 , RCI1_MISO7_S , bidir , X , 43 , 1 , Z ),"& " 41 (BC_2 , RCI1_MOSI2_S , output3 , X , 123 , 1 , Z ),"& " 40 (BC_2 , * , control , 1 ) ,"& " 39 (BC_2 , RCI1_MOSI3_S , output3 , X , 40 , 1 , Z ),"& " 38 (BC_2 , RCI1_MOSI0_S , output3 , X , 40 , 1 , Z ),"& " 37 (BC_2 , * , control , 1 ) ,"& " 36 (BC_2 , RCI1_MOSI1_S , output3 , X , 37 , 1 , Z ),"& " 35 (BC_2 , * , control , 1 ) ,"& " 34 (LV_BC_7 , RCI1_MISO0_S , bidir , X , 35 , 1 , Z ),"& " 33 (BC_2 , * , control , 1 ) ,"& " 32 (LV_BC_7 , RCI1_MISO1_S , bidir , X , 33 , 1 , Z ),"& " 31 (BC_2 , RCI1_CSN0_S , output3 , X , 37 , 1 , Z ),"& " 30 (BC_2 , * , control , 1 ) ,"& " 29 (BC_2 , RCI1_CSN1_S , output3 , X , 30 , 1 , Z ),"& " 28 (BC_2 , RCI1_SCLK_S , output3 , X , 30 , 1 , Z ),"& " 27 (BC_2 , * , control , 1 ) ,"& " 26 (LV_BC_7 , RCI1_GPIO8 , bidir , X , 27 , 1 , Z ),"& " 25 (BC_2 , * , control , 1 ) ,"& " 24 (LV_BC_7 , RCI1_GPIO9 , bidir , X , 25 , 1 , Z ),"& " 23 (BC_2 , * , control , 1 ) ,"& " 22 (LV_BC_7 , RCI1_GPIO6 , bidir , X , 23 , 1 , Z ),"& " 21 (BC_2 , * , control , 1 ) ,"& " 20 (LV_BC_7 , RCI1_GPIO7 , bidir , X , 21 , 1 , Z ),"& " 19 (BC_2 , * , control , 1 ) ,"& " 18 (LV_BC_7 , RCI1_GPIO4 , bidir , X , 19 , 1 , Z ),"& " 17 (BC_2 , * , control , 1 ) ,"& " 16 (LV_BC_7 , RCI1_GPIO5 , bidir , X , 17 , 1 , Z ),"& " 15 (BC_2 , * , control , 1 ) ,"& " 14 (LV_BC_7 , RCI1_GPIO2 , bidir , X , 15 , 1 , Z ),"& " 13 (BC_2 , * , control , 1 ) ,"& " 12 (LV_BC_7 , RCI1_GPIO3 , bidir , X , 13 , 1 , Z ),"& " 11 (BC_2 , * , control , 1 ) ,"& " 10 (LV_BC_7 , RCI1_GPIO0 , bidir , X , 11 , 1 , Z ),"& " 9 (BC_2 , * , control , 1 ) ,"& " 8 (LV_BC_7 , RCI1_GPIO1 , bidir , X , 9 , 1 , Z ),"& " 7 (BC_2 , * , control , 1 ) ,"& " 6 (LV_BC_7 , RCI1_MISO5_S , bidir , X , 7 , 1 , Z ),"& " 5 (LV_BC_7 , RCI1_MISO6_S , bidir , X , 7 , 1 , Z ),"& " 4 (BC_2 , * , control , 1 ) ,"& " 3 (LV_BC_7 , RCI1_MISO2_S , bidir , X , 4 , 1 , Z ),"& " 2 (LV_BC_7 , RCI1_MISO4_S , bidir , X , 4 , 1 , Z ),"& " 1 (BC_2 , * , control , 1 ) ,"& " 0 (LV_BC_7 , RCI1_MISO3_S , bidir , X , 1 , 1 , Z ) "; attribute AIO_COMPONENT_CONFORMANCE of RWM6050: entity is "STD_1149_6_2003"; attribute AIO_Pin_Behavior of RWM6050: entity is "PCIE_TX0_P ;"& "PCIE_RX0_P[158] : LP_Time=1.00e-08 HP_Time=6.00e-08;"& "PCIE_TX1_P ;"& "PCIE_RX1_P[154] : LP_Time=1.00e-08 HP_Time=6.00e-08"; end RWM6050; -- -- VHDL package to be uploaded --package LVS_BSCAN_CELLS is -- use STD_1149_1_2001.all; -- constant LV_BC_7: CELL_INFO; -- --end LVS_BSCAN_CELLS; --package body LVS_BSCAN_CELLS is -- use STD_1149_1_2001.all; -- constant LV_BC_7: CELL_INFO := -- ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, PO), -- (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI), -- (BIDIR_IN, INTEST, X), (BIDIR_OUT, INTEST, PI)); -- --end LVS_BSCAN_CELLS; --