Microprocessors
The AX100, AX110, and AX150 product families are high-performance automotive applications processors for next-generation digital cockpit systems like eCockpit, virtual cluster and infotainment platforms.
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Part Number (3)
AX100
AX100
Primary Application Cpu
6× Cortex-A55 @ 2.0 GHz
Primary Application Cpu Cache
32 KB I-cache + 32 KB D-cache per core; 128 KB L2 per core; 1 MB L3
Secondary Application Cpu
-
Secondary Application Cpu Cache
-
Gpu
IMG PowerVR 9XM GPU
Ai Ml Acceleration
High-efficiency AI accelerator; supports TensorFlow/Caffe
Isp Vision Processing
-
Video Encode Decode
H.264 encode/decode; H.265, VP8, VP9 decode
Display Interfaces
2× 4-lane MIPI-DSI; 4× LVDS
Camera Interfaces
2× 4-lane MIPI-CSI with 4 virtual channels; 1× 8-bit Parallel CSI
Application Sram
768 KB system RAM
External Dram Interface
32-bit DRAM interface @ 4267 MT/s; LPDDR4/LPDDR4x; DDR4; optional inline ECC
High Speed Interfaces
2× USB 3.0; 2× PCIe 3.0 RC/EP dual-role
Ethernet
1× Gigabit Ethernet TSN
Storage Interfaces
2× eMMC 5.1; 2× SD 3.0/SDIO; 1× QuadSPI/OctalSPI
Audio Interfaces Application
4× SPDIF; 6× single-channel I2S/TDM; 2× multi-channel I2S
Adc
12-bit SAR ADC, 5 MS/s; 4 analog input channels
General Peripherals Application
4× SPI; 8× UART; 12× I2C; GPIO; PWM; watchdog; timer
Secure Processor Hsm
Cortex-R5 in DCLS mode; 32 KB I-cache + 32 KB D-cache; 128 KB TCM
Multi Purpose Processor
Cortex-R5 in DCLS mode; 32 KB I-cache + 32 KB D-cache; 128 KB TCM
Safety Island Cpu
Cortex-R5F @ 800 MHz in DCLS mode
Safety Island Memory
256 KB system RAM; 128 KB ROM; all memory with ECC
Safety Island Interfaces
1× QuadSPI/OctalSPI; 2× single-channel I2S/TDM; 2× CAN-FD; 4× SPI; 8× UART; 4× I2C; GPIO; PWM; temperature sensor; watchdog; timer
Low Power Rtc Domain
32 kHz oscillator; real-time clock; system power and reset control; 2048-bit secure storage register
Junction Temperature
-40 to 125°C Tj
Automotive Qualification Esd
AEC-Q100 Grade 2, -40 to 105°C; HBM ESD Level 2; CDM ESD Level C1
Description
Automotive applications processor for next-gen instrument cluster and infotainment
Package (mm)
21 × 21 FCBGA
AX110
AX110
Primary Application Cpu
6× Cortex-A55 @ 2.0 GHz
Primary Application Cpu Cache
32 KB I-cache + 32 KB D-cache per core; 128 KB L2 per core; 1 MB L3
Secondary Application Cpu
1× Cortex-A55 @ 1.4 GHz
Secondary Application Cpu Cache
32 KB I-cache + 32 KB D-cache; 128 KB L2
Gpu
IMG PowerVR 9XM GPU
Ai Ml Acceleration
High-efficiency AI accelerator; supports TensorFlow/Caffe
Isp Vision Processing
-
Video Encode Decode
H.264 encode/decode; H.265, VP8, VP9 decode
Display Interfaces
2× 4-lane MIPI-DSI; 4× LVDS
Camera Interfaces
2× 4-lane MIPI-CSI with 4 virtual channels; 1× 8-bit Parallel CSI
Application Sram
768 KB system RAM
External Dram Interface
32-bit DRAM interface @ 4267 MT/s; LPDDR4/LPDDR4x; DDR4; optional inline ECC
High Speed Interfaces
2× USB 3.0; 2× PCIe 3.0 RC/EP dual-role
Ethernet
1× Gigabit Ethernet TSN
Storage Interfaces
2× eMMC 5.1; 2× SD 3.0/SDIO; 1× QuadSPI/OctalSPI
Audio Interfaces Application
4× SPDIF; 6× single-channel I2S/TDM; 2× multi-channel I2S
Adc
12-bit SAR ADC, 5 MS/s; 4 analog input channels
General Peripherals Application
4× SPI; 8× UART; 12× I2C; GPIO; PWM; watchdog; timer
Secure Processor Hsm
Cortex-R5 in DCLS mode; 32 KB I-cache + 32 KB D-cache; 128 KB TCM
Multi Purpose Processor
Cortex-R5 in DCLS mode; 32 KB I-cache + 32 KB D-cache; 128 KB TCM
Safety Island Cpu
Cortex-R5F @ 800 MHz in DCLS mode
Safety Island Memory
256 KB system RAM; 128 KB ROM; all memory with ECC
Safety Island Interfaces
1× QuadSPI/OctalSPI; 2× single-channel I2S/TDM; 2× CAN-FD; 4× SPI; 8× UART; 4× I2C; GPIO; PWM; temperature sensor; watchdog; timer
Low Power Rtc Domain
32 kHz oscillator; real-time clock; system power and reset control; 2048-bit secure storage register
Junction Temperature
-40 to 125°C Tj
Automotive Qualification Esd
AEC-Q100 Grade 2, -40 to 105°C; HBM ESD Level 2; CDM ESD Level C1
Description
Automotive applications processor for next-gen Entry eCockpit
Package (mm)
21 × 21 FCBGA
AX150
AX150
Primary Application Cpu
8× Cortex-A55 @ 2.3 GHz (w/ inline ECC support)
Primary Application Cpu Cache
32 KB I-cache + 32 KB D-cache per core; 128 KB L2 per core; 1 MB L3
Secondary Application Cpu
4× Cortex-A55 @ 2.0 GHz (w/ inline ECC support)
Secondary Application Cpu Cache
32 KB I-cache + 32 KB D-cache per core; 128 KB L2 per core; 512 KB L3
Gpu
IMG PowerVR 9XM GPU
Ai Ml Acceleration
High-efficiency NPU
Isp Vision Processing
ISP plus Vision DSP ×2
Video Encode Decode
H.264 encode/decode; H.265 encode/decode
Display Interfaces
2× 4-lane MIPI-DSI; 4× LVDS
Camera Interfaces
2× 4-lane MIPI-CSI with 4 virtual channels; 1× 8-bit Parallel CSI
Application Sram
8 MB system RAM
External Dram Interface
LPDDR4/LPDDR4x; optional inline ECC
High Speed Interfaces
2× USB 3.0; 2× PCIe 3.0 RC/EP dual-role
Ethernet
1× Gigabit Ethernet TSN
Storage Interfaces
2× eMMC 5.1; 2× SD 3.0/SDIO; 1× QuadSPI/OctalSPI
Audio Interfaces Application
4× SPDIF; 6× single-channel I2S/TDM; 2× multi-channel I2S
Adc
12-bit SAR ADC, 5 MS/s; 4 analog input channels
General Peripherals Application
4× SPI; 8× UART; 12× I2C; GPIO; PWM; watchdog; timer
Secure Processor Hsm
Cortex-R5 in DCLS mode; 32 KB I-cache + 32 KB D-cache; 128 KB TCM; ECC on cache and TCM
Multi Purpose Processor
Cortex-R5 in DCLS mode; 32 KB I-cache + 32 KB D-cache; 128 KB TCM; ECC on cache and TCM
Safety Island Cpu
Cortex-R5F @ 800 MHz in DCLS mode
Safety Island Memory
1 MB system RAM; 128 KB ROM; all memory with ECC
Safety Island Interfaces
1× QuadSPI/OctalSPI; 2× single-channel I2S/TDM; 2× CAN-FD; 4× SPI; 8× UART; 4× I2C; GPIO; PWM; temperature sensor; watchdog; timer
Low Power Rtc Domain
32 kHz oscillator; real-time clock; system power and reset control; 2048-bit secure storage register
Junction Temperature
-40 to 125°C Tj
Automotive Qualification Esd
AEC-Q100 Grade 2, -40 to 105°C; HBM ESD Level 2; CDM ESD Level C1
Description
Automotive applications processor for next-gen eCockpit, virtual cluster, and infotainment
Package (mm)
21 × 21 FCBGA
