Axiro Semiconductor is a fast-growing technology company specializing in advanced chip design and embedded solutions. We’re known for our innovation-driven culture, global talent network, and commitment to building scalable, high-performance systems for next-gen applications.

Responsibilities 

• Work with senior engineers to understand design specifications and assist inreating transistor-level layouts for analog,RF and mixed-signal blocks.
• Perform layout design of analog blocks (Op-Amps, Bandgaps, Current Mirrors, etc.), and custom circuits under guidance.
• Ensure DRC, LVS, ERC, and other verification checks are clean as per foundry requirements.
• Follow best practices for matching, symmetry, shielding, and noise isolation in layout design.
• Collaborate with circuit designers and verification engineers to ensure design intent is met.
• Maintain proper documentation of design work and adhere to projectschedules.

Requirements

• Basic understanding of MOS devices, analog circuits, and semiconductor fundamentals.
• Familiarity with Cadence Virtuoso or similar EDA tools (academic exposure acceptable).
• Awareness of layout techniques such as matching, common-centroid, shielding, and guard-rings.
• Knowledge of design rules (DRC), layout vs schematic (LVS), and parasitic effects is a plus.
• Good problem-solving skills with attention to detail.
• Strong willingness to learn and adapt to fast-paced semiconductor design workflows.
• Knowledge in semiconductor fabrication is desirable.